Leaked over at Chiphell Forums, the image shows an undisclosed AMD EPYC Genoa CPU without its massive heat spreader. This chip features a total of 12 CCD’s and while we don’t know how many of them are enabled on this part, such configurations will offer up to 96 cores and 192 threads. There is also the massive IO die and a lot of resistors on the interposer which will fit on the massive LGA 6096 package.
With the recent rumors suggesting the consumer-aimed Zen 4 CPUs hitting mass production later this month, it looks like the EPYC Genoa CPUs may also be targetting mass production soon since they are planned for official launch in the second half of 2022.
The LGA 6096 socket will feature 6096 pins arranged in the LGA (Land Grid Array) format. This will be by far the biggest socket that AMD has ever designed with 2002 more pins than the existing LGA 4094 socket. We have already listed the size and dimensions of this socket above so let’s talk about its power ratings. It looks like the peak power of the LGA 6096 SP5 socket will be rated at up to 700W which will only last for 1ms, the peak power at 10ms is rated at 440W while the peak power with PCC is rated at 600W. If the cTDP is exceeded, then the EPYC chips featured on the SP5 socket will return to these limits within 30ms.
AMD EPYC Milan Zen 3 vs EPYC Genoa Zen 4 Size Comparisons:
| CPU Name | AMD EPYC Milan | AMD EPYC Genoa |
|---|
| Process Node | TSMC 7nm | TSMC 5nm |
| Core Architecture | Zen 3 | Zen 4 |
| Zen CCD Die Size | 80mm2 | 72mm2 |
| Zen IOD Die Size | 416mm2 | 397mm2 |
| Substrate (Package) Area | TBD | 5428mm2 |
| Socket Area | 4410mm2 | 6080mm2 |
| Socket Name | LGA 4094 | LGA 6096 |
| Max Socket TDP | 450W | 700W |
The socket will support AMD’s EPYC Genoa and future generations of EPYC chips. Talking about Genoa CPUs themselves, the chips will pack a mammoth 96 cores and 192 threads. These will be based on AMD’s brand new Zen 4 core architecture which is expected to deliver some insane IPC uplifts while utilizing the TSMC 5nm process node. The physical chip is a gargantuan on its own with one of the largest CPU package ever as pictured below:
Other than that, it is stated that AMD’s EPYC Genoa CPUs will feature 128 PCIe Gen 5.0 lanes of which 112 PCIe Gen 5 lanes will be available since the remaining 16 are reserved, 160 for a 2P (dual-socket) configuration. The SP5 platform will also feature DDR5-5200 memory support which is some insane improvement over the existing DDR4-3200 Mbps DIMMs. But that’s not all, it will also support up to 12 DDR5 memory channels and 2 DIMMs per channel which will allow up to 12 TB of system memory using 1 TB 3DS RDIMM modules.